Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10831661 | Coherent cache with simultaneous data requests in same addressable index | Ekaterina M. Ambroladze, Tim Bronson, Robert J. Sonnelitter, III, Deanna Postles Dunn Berger, Chad G. Wilson +3 more | 2020-11-10 |
| 10833707 | Error trapping in memory structures | Glenn D. Gilda | 2020-11-10 |
| 10824565 | Configuration based cache coherency protocol selection | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Robert J. Sonnelitter, III | 2020-11-03 |
| 10802966 | Simultaneous, non-atomic request processing within an SMP environment broadcast scope for multiply-requested data elements using real-time parallelization | Arun Kwangil Iyengar, Tim Bronson, Michael A. Blake, Vesselina K. Papazova, Jason D. Kohl +1 more | 2020-10-13 |
| 10601448 | Reduced latency error correction decoding | Glenn D. Gilda, Patrick J. Meaney, Barry M. Trager | 2020-03-24 |