Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10824504 | Common high and low random bit error correction logic | James A. O'Connor, Warren E. Maule, Marc A. Gollub, Brad W. Michael, Patrick J. Meaney | 2020-11-03 |
| 10824508 | High efficiency redundant array of independent memory | Patrick J. Meaney, Christian Jacobi | 2020-11-03 |
| 10606692 | Error correction potency improvement via added burst beats in a dram access cycle | Paul W. Coteus, Kyu-hyoun Kim, Luis A. Lastras-Montano, Warren E. Maule, Patrick J. Meaney +1 more | 2020-03-31 |
| 10601448 | Reduced latency error correction decoding | Glenn D. Gilda, Patrick J. Meaney, Arthur J. O'Neill | 2020-03-24 |