Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10790287 | Reducing gate induced drain leakage in DRAM wordline | Gill Yong Lee, Sang Ho Yu, Shih Chung Chen, Jeffrey W. Anthis | 2020-09-29 |
| 10700072 | Cap layer for bit line resistance reduction | Priyadarshi Panda, Jianxin Lei, Wenting Hou, Mihaela Balseanu, Ning Li +4 more | 2020-06-30 |
| 10529602 | Method and apparatus for substrate fabrication | Priyadarshi Panda, Gill Yong Lee, Srinivas Gandikota, Sanjay Natarajan | 2020-01-07 |