Issued Patents 2019
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10510953 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2019-12-17 |
| 10504963 | RRAM memory cell with multiple filaments | Chin-Chieh Yang, Chih-Yang Chang, Wen-Ting Chu | 2019-12-10 |
| 10483322 | Memory device and method for fabricating the same | Ching-Pei Hsieh, Hsia-Wei Chen | 2019-11-19 |
| 10475852 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Hsia-Wei Chen, Chih-Yang Chang, Kuo-Chi Tu, Wen-Ting Chu | 2019-11-12 |
| 10388868 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Sheng-Hung Shih +2 more | 2019-08-20 |
| 10388865 | High yield RRAM cell with optimized film scheme | Trinh Hai Dang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chin-Chieh Yang, Wen-Ting Chu +1 more | 2019-08-20 |
| 10276790 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang +2 more | 2019-04-30 |
| 10276485 | Method for forming a homogeneous bottom electrode via (BEVA) top surface for memory | Hsia-Wei Chen, Wen-Ting Chu | 2019-04-30 |
| 10199575 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2019-02-05 |