Issued Patents 2019
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10510953 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Chih-Yang Chang, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2019-12-17 |
| 10497436 | Memory device and fabrication thereof | Chu-Jie Huang, Sheng-Hung Shih, Nai-Chao Su, Wen-Ting Chu | 2019-12-03 |
| 10475852 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Hsia-Wei Chen, Chih-Yang Chang, Wen-Ting Chu, Yu-Wen Liao | 2019-11-12 |
| 10388868 | Resistance variable memory structure and method of forming the same | Chih-Yang Chang, Hsia-Wei Chen, Chin-Chieh Yang, Sheng-Hung Shih, Wen-Chun You +2 more | 2019-08-20 |
| 10311952 | Method and apparatus for reading RRAM cell | Chin-Chieh Yang, Chih-Yang Chang, Chang-Sheng Liao, Hsia-Wei Chen, Jen-Sheng Yang +4 more | 2019-06-04 |
| 10276790 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Chih-Yang Chang, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2019-04-30 |
| 10276489 | Series MIM structures | Chin-Chieh Yang, Wen-Ting Chu | 2019-04-30 |
| 10249756 | Semiconductor device including memory and logic circuit having FETs with ferroelectric layer and manufacturing methods thereof | Jen-Sheng Yang, Sheng-Hung Shih, Tong-Chern Ong, Wen-Ting Chu | 2019-04-02 |
| 10199575 | RRAM cell structure with laterally offset BEVA/TEVA | Chih-Yang Chang, Wen-Ting Chu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2019-02-05 |