Issued Patents 2019
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522532 | Through via extending through a group III-V layer | Chung-Yen Chou, Chia-Shiung Tsai, Yung-Chang Chang | 2019-12-31 |
| 10516107 | Memory cell having resistance variable film and method of making the same | Ching-Pei Hsieh, Chia-Shiung Tsai, Chern-Yow Hsu, Fu-Ting Sung | 2019-12-24 |
| 10516026 | Split gate memory device and method of fabricating the same | Chang-Ming Wu, Wei-Cheng Wu, Harry-Hak-Lay Chuang, Chia-Shiung Tsai | 2019-12-24 |
| 10510766 | Flash memory structure with reduced dimension of gate structure and methods of forming thereof | Sheng-Chieh Chen, Ming Chyi Liu | 2019-12-17 |
| 10509169 | Semiconductor structure and manufacturing method of the same | Yung-Chang Chang, Chung-Yen Chou, Ming Chyi Liu | 2019-12-17 |
| 10510763 | Embedded nonvolatile memory and forming method thereof | Chang-Ming Wu, Wei-Cheng Wu, Yuan-Tai Tseng, Chia-Shiung Tsai, Ru-Liang Lee +1 more | 2019-12-17 |
| 10510952 | Storage device with composite spacer and method for manufacturing the same | Fu-Ting Sung, Chern-Yow Hsu | 2019-12-17 |
| 10510803 | Semiconductor memory device and method for fabricating the same | Harry-Hak-Lay Chuang, Sheng-Huang Huang, Chern-Yow Hsu | 2019-12-17 |
| 10505110 | Phase change memory structure to reduce power consumption | Yi Jen Tsai | 2019-12-10 |
| 10504904 | Semiconductor arrangement with capacitor and method of fabricating the same | Chern-Yow Hsu, Chen-Jong Wang, Chia-Shiung Tsai, Ming Chyi Liu, Xiaomeng Chen | 2019-12-10 |
| 10490742 | Method for forming a phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element | Yi Jen Tsai | 2019-11-26 |
| 10490460 | Semiconductor arrangement and method of forming | Harry-Hak-Lay Chuang, Wei-Cheng Wu, Chin-Yi Huang | 2019-11-26 |
| 10475998 | Resistive random access memory structure | Chern-Yow Hsu, Fu-Ting Sung | 2019-11-12 |
| 10468587 | Semiconductor structure, electrode structure and method of forming the same | Chung-Yen Chou, Fu-Ting Sung, Yao-Wen Chang | 2019-11-05 |
| 10461089 | Cell boundary structure for embedded memory | Ming Chyi Liu, Sheng-Chieh Chen, Yu-Hsing Chang | 2019-10-29 |
| 10454021 | Semiconductor structure and method of manufacturing the same | Fu-Ting Sung, Chung-Chiang Min, Yuan-Tai Tseng, Chern-Yow Hsu | 2019-10-22 |
| 10453932 | Semiconductor structure for flash memory cells and method of making same | Ming Chyi Liu, Chang-Ming Wu, Wei-Cheng Wu, Harry-Hak-Lay Chuang, Chia-Shiung Tsai +1 more | 2019-10-22 |
| 10361234 | 3DIC interconnect apparatus and method | Shih Pei Chou, Hung-Wen Hsu, Ching-Chung Su, Chun-Han Tsao, Chia-Chieh Lin +4 more | 2019-07-23 |
| 10355011 | Method for forming flash memory structure | Fu-Ting Sung, Chung-Chiang Min, Wei-Hang Huang, Chia-Shiung Tsai | 2019-07-16 |
| 10325910 | Semiconductor device containing HEMT and MISFET and method of forming the same | Chung-Yen Chou, Sheng-De Liu, Fu-Chih Yang, Chia-Shiung Tsai | 2019-06-18 |
| 10304848 | Flash memory structure with reduced dimension of gate structure | Sheng-Chieh Chen, Ming Chyi Liu | 2019-05-28 |
| 10297604 | Split gate memory devices and methods of manufacturing | Chang-Ming Wu, Chia-Shiung Tsai, Ru-Liang Lee | 2019-05-21 |
| 10283700 | Semiconductor memory structure with magnetic tunnel junction (MTJ) cell | Shih-Wei Lin, Yuan-Tai Tseng | 2019-05-07 |
| 10276584 | Method to control the common drain of a pair of control gates and to improve inter-layer dielectric (ILD) filling between the control gates | Chung-Chiang Min, Tsung-Hsueh Yang, Chang-Ming Wu | 2019-04-30 |
| 10276634 | Semiconductor memory structure with magnetic tunnel junction (MTJ) cell | Shih-Wei Lin, Yuan-Tai Tseng | 2019-04-30 |