Issued Patents 2019
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10497785 | Gallium nitride voltage regulator | Han Wui Then, Marko Radosavljevic | 2019-12-03 |
| 10475888 | Integration of III-V devices on Si wafers | Han Wui Then, Seung Hoon Sung, Sanaz K. Gardner, Marko Radosavljevic, Benjamin Chu-Kung +1 more | 2019-11-12 |
| 10475706 | Making a defect free fin based device in lateral epitaxy overgrowth region | Niti Goel, Benjamin Chu-Kung, Niloy Mukherjee, Matthew V. Metz, Van H. Le +3 more | 2019-11-12 |
| 10453679 | Methods and devices integrating III-N transistor circuitry with Si transistor circuitry | Marko Radosavljevic, Han Wui Then, Ravi Pillarisetty, Kimin Jun, Patrick Morrow +3 more | 2019-10-22 |
| 10439057 | Multi-gate high electron mobility transistors and methods of fabrication | Kimin Jun, Alejandro X. Levander, Patrick Morrow | 2019-10-08 |
| 10431717 | Light-emitting diode (LED) and micro LED substrates and methods for making the same | Marko Radosavljevic, Han Wui Then | 2019-10-01 |
| 10411067 | Integrated RF frontend structures | Han Wui Then, Marko Radosavljevic | 2019-09-10 |
| 10388777 | Heteroepitaxial structures with high temperature stable substrate interface material | Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung, Robert S. Chau | 2019-08-20 |
| 10347544 | Co-planar p-channel and n-channel gallium nitride-based transistors on silicon and techniques for forming same | Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung | 2019-07-09 |
| 10347834 | Wafer-scale integration of vacancy centers for spin qubits | Nicole K. Thomas, Marko Radosavljevic, Ravi Pillarisetty, Kanwaljit Singh, Hubert C. George +6 more | 2019-07-09 |
| 10332998 | Transistors with heteroepitaxial III-N source/drain | Han Wui Then, Marko Radosavljevic | 2019-06-25 |
| 10325774 | Wurtzite heteroepitaxial structures with inclined sidewall facets for defect propagation control in silicon CMOS-compatible semiconductor devices | Han Wui Then, Benjamin Chu-Kung, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung +2 more | 2019-06-18 |
| 10249490 | Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy | Niti Goel, Robert S. Chau, Jack T. Kavalieros, Benjamin Chu-Kung, Matthew V. Metz +7 more | 2019-04-02 |
| 10243069 | Gallium nitride transistor having a source/drain structure including a single-crystal portion abutting a 2D electron gas | Han Wui Then, Marko Radosavljevic, Seung Hoon Sung, Sanaz K. Gardner, Robert S. Chau | 2019-03-26 |
| 10229991 | III-N epitaxial device structures on free standing silicon mesas | Han Wui Then, Sanaz K. Gardner, Marko Radosavljevic, Seung Hoon Sung, Benjamin Chu-Kung +1 more | 2019-03-12 |
| 10217673 | Integrated circuit die having reduced defect group III-nitride structures and methods associated therewith | Han Wui Then, Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung, Robert S. Chau +1 more | 2019-02-26 |
| 10211327 | Semiconductor devices with raised doped crystalline structures | Marko Radosavljevic, Sanaz K. Gardner, Seung Hoon Sung, Han Wui Then, Robert S. Chau | 2019-02-19 |
| 10204989 | Method of fabricating semiconductor structures on dissimilar substrates | Benjamin Chu-Kung, Sherry R. Taft, Van H. Le, Seung Hoon Sung, Sanaz K. Gardner +3 more | 2019-02-12 |
| 10170612 | Epitaxial buffer layers for group III-N transistors on silicon substrates | Han Wui Then, Niloy Mukherjee, Marko Radosavljevic, Robert S. Chau | 2019-01-01 |