Issued Patents 2019
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10497781 | Methods for doping a sub-fin region of a semiconductor structure by backside reveal and associated devices | Aaron D. Lilak, Stephen M. Cea, Rishabh Mehandru | 2019-12-03 |
| 10483385 | Nanowire structures having wrap-around contacts | Stephen M. Cea, Patrick H. Keys, Seiyon Kim, Michael Haverty, Sadasivan Shankar | 2019-11-19 |
| 10411090 | Hybrid trigate and nanowire CMOS device architecture | Rishabh Mehandru, Stephen M. Cea | 2019-09-10 |
| 10304946 | Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices | Rishabh Mehandru, Patrick Morrow, Ranjith Kumar, Seiyon Kim, Stephen M. Cea +1 more | 2019-05-28 |