Issued Patents 2019
Showing 1–25 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521351 | Temporarily suppressing processing of a restrained storage operand request | Bruce C. Giamei, Daniel V. Rosa, Anthony Saporito, Donald W. Schmidt, Chung-Lung K. Shum | 2019-12-31 |
| 10521506 | Memory preserving parse tree based compression with entropy coding | Jonathan D. Bradbury, Markus Helms, Aditya N. Puranik, Christian Zoellin | 2019-12-31 |
| 10521350 | Determining the effectiveness of prefetch instructions | Michael K. Gschwind, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-12-31 |
| 10514911 | Structure for microprocessor including arithmetic logic units and an efficiency logic unit | Avraham Ayzenfeld, Lee Evan Eisen, Brian W. Curran | 2019-12-24 |
| 10503503 | Generating design structure for microprocessor with arithmetic logic units and an efficiency logic unit | Avraham Ayzenfeld, Lee Evan Eisen, Brian W. Curran | 2019-12-10 |
| 10496311 | Run-time instrumentation of guarded storage event processing | Dan F. Greiner, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-12-03 |
| 10496405 | Generating and verifying hardware instruction traces including memory data contents | Jane H. Bartik, David Lee, Jang-Soo Lee, Anthony Saporito, Christian Zoellin | 2019-12-03 |
| 10496292 | Saving/restoring guarded storage controls in a virtualized environment | Dan F. Greiner, Damian L. Osisek, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-12-03 |
| 10452395 | Instruction to query cache residency | Dan F. Greiner, Michael K. Gschwind, Anthony Saporito, Chung-Lung K. Shum, Timothy J. Slegel | 2019-10-22 |
| 10452288 | Identifying processor attributes based on detecting a guarded storage event | Dan F. Greiner, Marcel Mitran, Volodymyr Paprotski, Anthony Saporito, Timothy J. Slegel | 2019-10-22 |
| 10445248 | Host page management using active guest page table indicators | Jonathan D. Bradbury, Michael K. Gschwind, Lisa C. Heller, Damian L. Osisek, Anthony Saporito | 2019-10-15 |
| 10437602 | Program interruption filtering in transactional execution | Dan F. Greiner, Marcel Mitran, Timothy J. Slegel | 2019-10-08 |
| 10430188 | Next instruction access intent instruction for indicating usage of a storage operand by one or more instructions subsequent to a next sequential instruction | Chung-Lung K. Shum, Timothy Siegel, Gustav E. Sittmann, III | 2019-10-01 |
| 10430195 | Stream based branch prediction index accelerator with power prediction | James J. Bonanno, Michael J. Cadigan, Jr., Adam B. Collura, Daniel Lipetz, Anthony Saporito | 2019-10-01 |
| 10430199 | Program interruption filtering in transactional execution | Dan F. Greiner, Marcel Mitran, Timothy J. Slegel | 2019-10-01 |
| 10430246 | Virtualized and synchronous access to hardware accelerators | Brenton F. Belmar, Matthias Klein, Peter G. Sutton | 2019-10-01 |
| 10417252 | Optimizing data conversion using pattern frequency | Markus Helms, Aditya N. Puranik, Parminder Singh | 2019-09-17 |
| 10387311 | Cache directory that determines current state of a translation in a microprocessor core cache | Ute Gaertner, Gregory Miaskovsky, Martin Recktenwald, Timothy J. Slegel, Aaron Tsai | 2019-08-20 |
| 10380032 | Multi-engine address translation facility | Uwe Brandt, Markus Helms, Markus Kaltenbach, Thomas Koehler, Frank Lehnert | 2019-08-13 |
| 10380033 | Multi-engine address translation facility | Uwe Brandt, Markus Helms, Markus Kaltenbach, Thomas Koehler, Frank Lehnert | 2019-08-13 |
| 10379862 | Effectiveness and prioritization of prefeteches | Michael K. Gschwind, Anthony Saporito, Chung-Lung K. Shum | 2019-08-13 |
| 10372457 | Effectiveness and prioritization of prefetches | Michael K. Gschwind, Anthony Saporito, Chung-Lung K. Shum | 2019-08-06 |
| 10365929 | Spin loop delay instruction | Fadi Y. Busaba, Anthony Saporito, Eric M. Schwarz, Timothy J. Slegel | 2019-07-30 |
| 10365928 | Suppress unnecessary mapping for scratch register | Gregory W. Alexander, David S. Hutton, Edward T. Malley, Anthony Saporito | 2019-07-30 |
| 10360033 | Conditional transaction end instruction | Dan F. Greiner, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel | 2019-07-23 |