Issued Patents 2019
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10387326 | Incorporating purge history into least-recently-used states of a translation lookaside buffer | Markus Helms, Thomas Kohler, Frank Lehnert | 2019-08-20 |
| 10380033 | Multi-engine address translation facility | Markus Helms, Christian Jacobi, Markus Kaltenbach, Thomas Koehler, Frank Lehnert | 2019-08-13 |
| 10380032 | Multi-engine address translation facility | Markus Helms, Christian Jacobi, Markus Kaltenbach, Thomas Koehler, Frank Lehnert | 2019-08-13 |
| 10353828 | Zone-SDID mapping scheme for TLB purges | Ute Gaertner, Lisa C. Heller, Markus Helms, Christian Jacobi, Thomas Koehler +2 more | 2019-07-16 |
| 10353825 | Suspending translation look-aside buffer purge execution in a multi-processor environment | Ute Gaertner, Lisa C. Heller, Markus Helms, Thomas Kohler, Frank Lehnert +2 more | 2019-07-16 |
| 10353827 | Zone-SDID mapping scheme for TLB purges | Ute Gaertner, Lisa C. Heller, Markus Helms, Christian Jacobi, Thomas Koehler +2 more | 2019-07-16 |
| 10289562 | Incorporating purge history into least-recently-used states of a translation lookaside buffer | Markus Helms, Thomas Kohler, Frank Lehnert | 2019-05-14 |
| 10248575 | Suspending translation look-aside buffer purge execution in a multi-processor environment | Ute Gaertner, Lisa C. Heller, Markus Helms, Thomas Kohler, Frank Lehnert +2 more | 2019-04-02 |