Issued Patents 2019
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10417127 | Selective downstream cache processing for data access | Willm Hinrichs, Markus Kaltenbach, Eyal Naor | 2019-09-17 |
| 10409724 | Selective downstream cache processing for data access | Willm Hinrichs, Markus Kaltenbach, Eyal Naor | 2019-09-10 |
| 10387311 | Cache directory that determines current state of a translation in a microprocessor core cache | Ute Gaertner, Christian Jacobi, Gregory Miaskovsky, Timothy J. Slegel, Aaron Tsai | 2019-08-20 |
| 10360030 | Efficient pointer load and format | Eyal Naor, Christian Zoellin, Aaron Tsai | 2019-07-23 |
| 10353707 | Efficient pointer load and format | Eyal Naor, Christian Zoellin, Aaron Tsai | 2019-07-16 |
| 10324847 | Bits register for synonyms in a memory system | Willm Hinrichs | 2019-06-18 |
| 10324846 | Bits register for synonyms in a memory system | Willm Hinrichs | 2019-06-18 |
| 10169041 | Efficient pointer load and format | Eyal Naor, Christian Zoellin, Aaron Tsai | 2019-01-01 |