Issued Patents 2019
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10417127 | Selective downstream cache processing for data access | Markus Kaltenbach, Eyal Naor, Martin Recktenwald | 2019-09-17 |
| 10409724 | Selective downstream cache processing for data access | Markus Kaltenbach, Eyal Naor, Martin Recktenwald | 2019-09-10 |
| 10324846 | Bits register for synonyms in a memory system | Martin Recktenwald | 2019-06-18 |
| 10324847 | Bits register for synonyms in a memory system | Martin Recktenwald | 2019-06-18 |