Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10431565 | Wafer edge partial die engineered for stacked die yield | Henley Liu, Cheang-Whang Chang | 2019-10-01 |
| 10262911 | Circuit for and method of testing bond connections between a first die and a second die | Yuqing Gong, Henley Liu, Suresh Parameswaran, Cheang-Whang Chang, Boon Yong Ang | 2019-04-16 |