Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10431565 | Wafer edge partial die engineered for stacked die yield | Myongseob Kim, Henley Liu | 2019-10-01 |
| 10379155 | In-die transistor characterization in an IC | Ping-Chin Yeh, John K. Jennings, Rhesa Nathanael, Nui Chong, Daniel Chung | 2019-08-13 |
| 10262911 | Circuit for and method of testing bond connections between a first die and a second die | Yuqing Gong, Henley Liu, Myongseob Kim, Suresh Parameswaran, Boon Yong Ang | 2019-04-16 |