Issued Patents 2018
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10164480 | Composite integrated circuits and methods for wireless interactions therewith | Min-Jer Wang, Ching-Nen Peng, Chewn-Pu Jou, Feng-Wei Kuo, Hao Chen +4 more | 2018-12-25 |
| 10134522 | Planar reactor | Wei Zhang, Chu-Keng Lin, Hsieh-Shen Hsieh | 2018-11-20 |
| 10073135 | Alignment testing for tiered semiconductor structure | Mill-Jer Wang, Ching-Nen Peng, Hao Chen, Mincent Lee | 2018-09-11 |
| 10072830 | Uniform luminance light-emitting diode circuit board | — | 2018-09-11 |
| 10067181 | Testing holders for chip unit and die package | Mill-Jer Wang, Kuo-Chuan Liu, Ching-Nen Peng, Hao Chen | 2018-09-04 |
| 10002829 | Semiconductor device and manufacturing method thereof | Hao Chen, Chen-Hsiang Hsu, Ching-Nen Peng, Mill-Jer Wang | 2018-06-19 |
| 9952279 | Apparatus for three dimensional integrated circuit testing | Mill-Jer Wang, Ching-Nen Peng, Hao Chen, Chung-Han Huang, Chung-Sheng Yuan +3 more | 2018-04-24 |
| 9923384 | Method for performing efficiency optimization of an electronic device, and associated apparatus | Hao-Ping Hong | 2018-03-20 |
| 9923387 | Multi-mode wireless receiver apparatus and resonator circuit design | Yen-Hsun Hsu, Hao-Ping Hong | 2018-03-20 |
| 9915699 | Integrated fan-out pillar probe system | Mill-Jer Wang, Ching-Nen Peng, Hao Chen, Mincent Lee, Chen-Hung Tien +1 more | 2018-03-13 |
| 9900970 | Three dimensional integrated circuit electrostatic discharge protection and prevention test interface | Mill-Jer Wang, Ching-Nen Peng, Hao Chen | 2018-02-20 |
| 9891266 | Test circuit and method | Mill-Jer Wang, Ching-Nen Peng, Sen-Kuei Hsu, Chuan-Ching Wang, Hao Chen | 2018-02-13 |
| 9880201 | Systems for probing semiconductor wafers | Mill-Jer Wang, Ching-Nen Peng, Hao Chen | 2018-01-30 |
| 9859176 | Semiconductor device, test system and method of the same | Tang-Jung Chiu, Mill-Jer Wang, Hao Chen | 2018-01-02 |