Issued Patents 2018
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163491 | Memory circuit having shared word line | Li-Wen Wang, Yen-Huei Chen, Hung-Jen Liao | 2018-12-25 |
| 10153038 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hung-Jen Liao, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Sahil Preet Singh | 2018-12-11 |
| 10141059 | Failure detection circuitry for address decoder for a data storage device | Ching-Wei Wu | 2018-11-27 |
| 10062419 | Digtial circuit structures | Chih-Yu Lin, Wei-Cheng Wu, Yen-Huei Chen, Hung-Jen Liao | 2018-08-28 |
| 9984767 | Semiconductor device having capability of generating chip identification information | Makoto Yabuuchi, Koji Nii, Yoshikazu Saito | 2018-05-29 |
| 9947393 | Semiconductor integrated circuit device | Makoto Yabuuchi | 2018-04-17 |
| 9922700 | Memory read stability enhancement with short segmented bit line architecture | Mahmut Sinangil, Hung-Jen Liao, Jonathan Tsung-Yung Chang, Yen-Huei Chen, Sahil Preet Singh | 2018-03-20 |
| 9886996 | SRAM cell for interleaved wordline scheme | Hung-Jen Liao, Hsien-Yu Pan, Yen-Huei Chen, Mahmut Sinangil | 2018-02-06 |