Issued Patents 2018
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10120024 | Multi-stage test response compactors | Jerzy Tyszer, Grzegorz Mrugalski, Mark Kassab, Wu-Tung Cheng | 2018-11-06 |
| 10120029 | Low power testing based on dynamic grouping of scan | Sylwester Milewski, Grzegorz Mrugalski, Jerzy Tyszer | 2018-11-06 |
| 9933485 | Deterministic built-in self-test based on compressed test patterns stored on chip and their derivatives | Grzegorz Mrugalski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer | 2018-04-03 |
| 9915702 | Channel sharing for testing circuits having non-identical cores | Yu Huang, Mark Kassab, Wu-Tung Cheng, Jay Babak Jahangiri | 2018-03-13 |
| 9874606 | Selective per-cycle masking of scan chains for system level test | Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee | 2018-01-23 |