| 10140127 |
Operation of a multi-slice processor with selective producer instruction types |
Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden +2 more |
2018-11-27 |
| 10127047 |
Operation of a multi-slice processor with selective producer instruction types |
Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden +2 more |
2018-11-13 |
| 10073699 |
Processing instructions in parallel with waw hazards and via a distributed history buffer in a microprocessor having a multi-execution slice architecture |
Susan E. Eisen, Cliff Kucharski, Hung Q. Le, Dung Q. Nguyen |
2018-09-11 |
| 9985656 |
Generating ECC values for byte-write capable registers |
Dhivya Jeganathan, Dung Q. Nguyen, Jose Angel Paredes, Brian W. Thompto |
2018-05-29 |
| 9985655 |
Generating ECC values for byte-write capable registers |
Dhivya Jeganathan, Dung Q. Nguyen, Jose Angel Paredes, Brian W. Thompto |
2018-05-29 |
| 9971604 |
History buffer for multiple-field registers |
Sundeep Chadha, Michael J. Genden, Dung Q. Nguyen, Kenneth L. Ward |
2018-05-15 |
| 9959123 |
Speculative load data in byte-write capable register file and history buffer for a multi-slice microprocessor |
Joshua W. Bowman, Sundeep Chadha, Michael J. Genden, Dhivya Jeganathan, Dung Q. Nguyen +1 more |
2018-05-01 |
| 9952874 |
Operation of a multi-slice processor with selective producer instruction types |
Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden +2 more |
2018-04-24 |
| 9952861 |
Operation of a multi-slice processor with selective producer instruction types |
Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Michael J. Genden +2 more |
2018-04-24 |
| 9940139 |
Split-level history buffer in a computer processing unit |
Hung Q. Le, Dung Q. Nguyen |
2018-04-10 |
| 9928128 |
In-pipe error scrubbing within a processor core |
Brian D. Barrick, James Wilson Bishop, Marcy E. Byers, Sundeep Chadha, Niels Fricke +1 more |
2018-03-27 |
| 9928073 |
Determining of validity of speculative load data after a predetermined period of time in a multi-slice processor |
Joshua W. Bowman, Sundeep Chadha, Michael J. Genden, Dhivya Jeganathan, Dung Q. Nguyen +1 more |
2018-03-27 |
| 9921833 |
Determining of validity of speculative load data after a predetermined period of time in a multi-slice processor |
Joshua W. Bowman, Sundeep Chadha, Michael J. Genden, Dhivya Jeganathan, Dung Q. Nguyen +1 more |
2018-03-20 |
| 9870045 |
Reducing power consumption in a multi-slice computer processor |
Steven J. Battle, Owen Chiang, Sam Gat-Shang Chu, Saiful Islam, Dung Q. Nguyen +1 more |
2018-01-16 |
| 9870039 |
Reducing power consumption in a multi-slice computer processor |
Steven J. Battle, Owen Chiang, Sam Gat-Shang Chu, Saiful Islam, Dung Q. Nguyen +1 more |
2018-01-16 |
| 9858078 |
Speculative load data in byte-write capable register file and history buffer for a multi-slice microprocessor |
Joshua W. Bowman, Sundeep Chadha, Michael J. Genden, Dhivya Jeganathan, Dung Q. Nguyen +1 more |
2018-01-02 |