| 10157444 |
Dynamic page sizing of page table entries |
Abhishek R. Appu, Joydeep Ray, Balaji Vembu, Prasoonkumar Surti, Kamal Sinha +4 more |
2018-12-18 |
$25,622,000 |
| 10158346 |
Pulse triggered flip flop |
Bhushan M. Borole, Anupama A. Thaploo, Abhishek R. Appu, Kamal Sinha, Wenyin Fu |
2018-12-18 |
$25,622,000 |
| 10146691 |
System and method for performing partial cache line writes without fill-reads or byte enables |
Hashem Hashemi, Saurabh Sharma |
2018-12-04 |
$23,085,000 |
| 10108850 |
Recognition, reidentification and security enhancements using autonomous machines |
Barnan Das, Mayuresh M. Varerkar, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir +11 more |
2018-10-23 |
$21,867,000 |
| 10102149 |
Replacement policies for a hybrid hierarchical cache |
Abhishek R. Appu, Joydeep Ray, James Valerio, Prasoonkumar Surti, Balaji Vembu +3 more |
2018-10-16 |
$21,459,000 |
| 10102609 |
Low granularity coarse depth test efficiency enhancement |
Vasanth Ranganathan, Saikat Mandal, Karol A. Szerszen, Saurabh Sharma, Vamsee Vardhan Chivukula +3 more |
2018-10-16 |
$21,459,000 |
| 10102604 |
Data distribution fabric in scalable GPUs |
Lakshminarayanan Striramassarma, Akif Ali |
2018-10-16 |
$21,459,000 |
| 10089230 |
Resource-specific flushes and invalidations of cache and memory fabric structures |
Louis Feng, Tomasz Janczak, Andrew T. Lauritzen, David M. Cimini, Abhishek R. Appu |
2018-10-02 |
$23,827,000 |
| 10078590 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Opher Kahn |
2018-09-18 |
$29,867,000 |
| 10062429 |
System, apparatus and method for segmenting a memory array |
Bhushan M. Borole, Iqbal Rajwani, Anupama A. Thaploo, Sunil Nekkanti, Abhisek R. Appu |
2018-08-28 |
$28,989,000 |
| 10043232 |
Compute cluster preemption within a general-purpose graphics processing unit |
Murali Ramadoss, Balaji Vembu, Eric C. Samson, Kun Tian, David J. Cowperthwaite +4 more |
2018-08-07 |
$25,284,000 |
| 10013734 |
Programmable controller and command cache for graphics processors |
Jeffery S. Boles, Hema Chand Nalluri, Balaji Vembu, Michael Apodaca, Lalit K. Saptarshi |
2018-07-03 |
$24,450,000 |
| 9946650 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Opher Kahn |
2018-04-17 |
$23,996,000 |
| 9928170 |
Scatter/gather capable system coherent cache |
Thomas A. Piazza, Murali Sundaresan |
2018-03-27 |
$21,620,000 |
| 9916257 |
Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory |
Rajesh M. Sankaran, Philip R. Lantz, Asit K. Mallick, James B. Crossland, Aditya Navale +2 more |
2018-03-13 |
$24,990,000 |
| 9886934 |
Ordering mechanism for offload graphics scheduling |
Bryan R. White, Balaji Vembu, Murali Ramadoss, Aditya Navale |
2018-02-06 |
$17,987,000 |
