Issued Patents 2018
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10103234 | Fabricating raised source drain contacts of a CMOS structure | Veeresh V. Deshpande, Vladimir Djara | 2018-10-16 |
| 10037800 | Resistive memory apparatus using variable-resistance channels with high- and low-resistance regions | Veeresh V. Deshpande, Vara Sudananda Prasad Jonnalagadda, Wabe W. Koelmans, Abu Sebastian | 2018-07-31 |
| 9997409 | Fabricating contacts of a CMOS structure | Veeresh V. Deshpande, Vladimir Djara, Pouya Hashemi | 2018-06-12 |
| 9989703 | Semiconductor structure and method for manufacturing a semiconductor structure | Jean Fompeyrine, Jens Hofrichter, Bert Jan Offrein, Mirja Richter | 2018-06-05 |
| 9984929 | Fabricating contacts of a CMOS structure | Veeresh V. Deshpande, Vladimir Djara, Pouya Hashemi | 2018-05-29 |
| 9953125 | Design/technology co-optimization platform for high-mobility channels CMOS technology | Daniele Caimi, Veeresh V. Deshpande, Vladimir Djara, Jean Fompeyrine | 2018-04-24 |
| 9923022 | Array of optoelectronic structures and fabrication thereof | Mattias B. Borg, Veeresh V. Deshpande, Vladimir Djara, Heike E. Riel, Heinz Schmid | 2018-03-20 |
| 9917164 | Fabricating raised source drain contacts of a CMOS structure | Veeresh V. Deshpande, Vladimir Djara | 2018-03-13 |
| 9891112 | Radiation detector | Stefan Abel, Jean Fompeyrine, Bernd W. Gotsmann, Fabian Menges | 2018-02-13 |
| 9881921 | Fabricating a dual gate stack of a CMOS structure | Veeresh V. Deshpande, Vladimir Djara, Jean Fompeyrine | 2018-01-30 |
| 9870953 | System on chip material co-integration | Takashi Ando, Pouya Hashemi, Alexander Reznicek | 2018-01-16 |
| 9864134 | Semiconductor structure and method for manufacturing a semiconductor structure | Jean Fompeyrine, Jens Hofrichter, Bert Jan Offrein, Mirja Richter | 2018-01-09 |