Issued Patents 2018
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10103234 | Fabricating raised source drain contacts of a CMOS structure | Lukas Czornomaz, Veeresh V. Deshpande | 2018-10-16 |
| 9997409 | Fabricating contacts of a CMOS structure | Lukas Czornomaz, Veeresh V. Deshpande, Pouya Hashemi | 2018-06-12 |
| 9984929 | Fabricating contacts of a CMOS structure | Lukas Czornomaz, Veeresh V. Deshpande, Pouya Hashemi | 2018-05-29 |
| 9953125 | Design/technology co-optimization platform for high-mobility channels CMOS technology | Daniele Caimi, Lukas Czornomaz, Veeresh V. Deshpande, Jean Fompeyrine | 2018-04-24 |
| 9923022 | Array of optoelectronic structures and fabrication thereof | Mattias B. Borg, Lukas Czornomaz, Veeresh V. Deshpande, Heike E. Riel, Heinz Schmid | 2018-03-20 |
| 9917164 | Fabricating raised source drain contacts of a CMOS structure | Lukas Czornomaz, Veeresh V. Deshpande | 2018-03-13 |
| 9881921 | Fabricating a dual gate stack of a CMOS structure | Lukas Czornomaz, Veeresh V. Deshpande, Jean Fompeyrine | 2018-01-30 |