Issued Patents 2017
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9754847 | Circuit probing structures and methods for probing the same | Mill-Jer Wang, Hung-Chih Lin, Hao Chen | 2017-09-05 |
| 9671457 | 3D IC testing apparatus | Mill-Jer Wang, Chih-Chia Chen, Hung-Chih Lin, Hao Chen | 2017-06-06 |
| 9664707 | Testing holders for chip unit and die package | Mill-Jer Wang, Kuo-Chuan Liu, Hung-Chih Lin, Hao Chen | 2017-05-30 |
| 9658281 | Alignment testing for tiered semiconductor structure | Mill-Jer Wang, Hung-Chih Lin, Hao Chen, Mincent Lee | 2017-05-23 |
| 9653927 | Composite integrated circuits and methods for wireless interactions therewith | Min-Jer Wang, Chewn-Pu Jou, Feng-Wei Kuo, Hao Chen, Hung-Chih Lin +4 more | 2017-05-16 |
| 9640447 | Test circuit and method | Mill-Jer Wang, Hung-Chih Lin, Hao Chen, Chung-Han Huang | 2017-05-02 |
| 9606155 | Capacitance measurement circuit and method | Mill-Jer Wang, Hung-Chih Lin, Hao Chen, Chung-Han Huang | 2017-03-28 |
| 9568543 | Structure and method for testing stacked CMOS structure | Mill-Jer Wang, Hung-Chih Lin, Hao Chen | 2017-02-14 |