Issued Patents 2017
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9812463 | Three-dimensional memory device containing vertically isolated charge storage regions and method of making thereof | Rahul Sharangpani, Raghuveer S. Makala, Senaka Kanakamedala, Fei Zhou, Somesh Peri +4 more | 2017-11-07 |
| 9711530 | Locally-trap-characteristic-enhanced charge trap layer for three-dimensional memory structures | Yusuke Ikawa, Eisuke Takii | 2017-07-18 |
| 9666281 | Three-dimensional P-I-N memory device and method reading thereof using hole current detection | — | 2017-05-30 |
| 9601508 | Blocking oxide in memory opening integration scheme for three-dimensional memory structure | Jongsun Sel, Chan Park, Atsushi Suyama, Frank Yu, Hiroyuki Ogawa +6 more | 2017-03-21 |
| 9589839 | Method of reducing control gate electrode curvature in three-dimensional memory devices | Yusuke Ikawa, Eisuke Takii, Kengo Kajiwara, Seiji Shimabukuro, Akira Matsudaira +1 more | 2017-03-07 |