Issued Patents 2017
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9589839 | Method of reducing control gate electrode curvature in three-dimensional memory devices | Yusuke Ikawa, Kiyohiko Sakakibara, Eisuke Takii, Kengo Kajiwara, Seiji Shimabukuro +1 more | 2017-03-07 |
| 9576971 | Three-dimensional memory structure having a back gate electrode | Yanli Zhang, Johann Alsmeier, Yingda Dong | 2017-02-21 |
| 9552991 | Trench vertical NAND and method of making thereof | James Kai, Yuan Zhang, Vinod R. Purayath, Donovan Lee | 2017-01-24 |
| 9553146 | Three dimensional NAND device having a wavy charge storage layer | Yanli Zhang, Matthias Baenninger, Yao-Sheng Lee, Johann Alsmeier | 2017-01-24 |
| 9543139 | In-situ support structure for line collapse robustness in memory arrays | Donovan Lee | 2017-01-10 |