Issued Patents 2017
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9812463 | Three-dimensional memory device containing vertically isolated charge storage regions and method of making thereof | Rahul Sharangpani, Raghuveer S. Makala, Senaka Kanakamedala, Fei Zhou, Somesh Peri +4 more | 2017-11-07 |
| 9711530 | Locally-trap-characteristic-enhanced charge trap layer for three-dimensional memory structures | Yusuke Ikawa, Kiyohiko Sakakibara | 2017-07-18 |
| 9589839 | Method of reducing control gate electrode curvature in three-dimensional memory devices | Yusuke Ikawa, Kiyohiko Sakakibara, Kengo Kajiwara, Seiji Shimabukuro, Akira Matsudaira +1 more | 2017-03-07 |