SS

Swaminathan Sivakumar

IN Intel: 4 patents #597 of 5,604Top 15%
Overall (2017): #37,019 of 506,227Top 8%
4
Patents 2017

Issued Patents 2017

Patent #TitleCo-InventorsDate
9793159 Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects Charles H. Wallace, Paul A. Nyhus, Elliot N. Tan 2017-10-17
9716037 Gate aligned contact and method to fabricate same Oleg Golonzka, Charles H. Wallace, Tahir Ghani 2017-07-25
9653576 Patterning of vertical nanowire transistor channel and gate with directed self assembly Paul A. Nyhus 2017-05-16
9625815 Exposure activated chemically amplified directed self-assembly (DSA) for back end of line (BEOL) pattern cutting and plugging Paul A. Nyhus, Eungnak Han, Ernisse Putna 2017-04-18