Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9793159 | Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects | Charles H. Wallace, Paul A. Nyhus, Swaminathan Sivakumar | 2017-10-17 |
| 9659860 | Method and structure to contact tight pitch conductive layers with guided vias | Richard E. Schenker | 2017-05-23 |
| 9558947 | Pattern decomposition lithography techniques | Charles H. Wallace, Hossam M. Abdallah, Swaminathan Sivakumar, Oleg Golonzka, Robert M. Bigwood | 2017-01-31 |