Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9824754 | Techniques for determining victim row addresses in a volatile memory | Brian S. Morris, Suneeta Sah, Roy M. Stevens, Ted Rossin, Mathew W. Stefaniw +1 more | 2017-11-21 |
| 9747041 | Apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device | Vedaraman Geetha, Henk G. Neefs, Brian S. Morris, Massimo Sutera | 2017-08-29 |