Issued Patents 2017
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9747041 | Apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device | Vedaraman Geetha, Brian S. Morris, Sreenivas Mandava, Massimo Sutera | 2017-08-29 |