Issued Patents 2017
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9812387 | Semiconductor substrate, semiconductor module and method for manufacturing the same | Li-Chuan Tsai | 2017-11-07 |
| 9754906 | Double plated conductive pillar package substrate | Li-Chuan Tsai | 2017-09-05 |
| 9721799 | Semiconductor package with reduced via hole width and reduced pad patch and manufacturing method thereof | Yu-Lin Shih | 2017-08-01 |
| 9721899 | Embedded component package structure and method of manufacturing the same | Hsing Kuo Tien | 2017-08-01 |
| 9659853 | Double side via last method for double embedded patterned substrate | You-Lung Yen, Yuan-Chang Su | 2017-05-23 |
| 9583427 | Semiconductor substrate, semiconductor package structure and method of making the same | Yuan-Chang Su, Cheng-Lin Ho, Chung-Ming Wu, You-Lung Yen | 2017-02-28 |
| 9549468 | Semiconductor substrate, semiconductor module and method for manufacturing the same | Li-Chuan Tsai | 2017-01-17 |