Issued Patents 2016
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9453877 | Testing holders for chip unit and die package | Mill-Jer Wang, Kuo-Chuan Liu, Hung-Chih Lin, Hao Chen | 2016-09-27 |
| 9448285 | Method and apparatus of wafer testing | Mill-Jer Wang, Hung-Chih Lin, Hao Chen, Shang-Ju Lee | 2016-09-20 |
| 9417285 | Integrated fan-out package-on-package testing | Mill-Jer Wang, Hung-Chih Lin, Hao Chen | 2016-08-16 |
| 9372227 | Integrated circuit test system and method | Mill-Jer Wang, Hung-Chih Lin, Wei-Hsun Lin, Hao Chen, Chung-Han Huang | 2016-06-21 |
| 9354254 | Test-yield improvement devices for high-density probing techniques and method of implementing the same | Mill-Jer Wang, Hung-Chih Lin, Wei-Hsun Lin, Sen-Kuei Hsu, De-Jian Liu | 2016-05-31 |
| 9341671 | Testing holders for chip unit and die package | Mill-Jer Wang, Kuo-Chuan Liu, Hung-Chih Lin, Hao Chen | 2016-05-17 |
| 9310437 | Adaptive test sequence for testing integrated circuits | Chun-Cheng Chen, Hung-Chih Lin, Mill-Jer Wang, Hao Chen | 2016-04-12 |
| 9252593 | Three dimensional integrated circuit electrostatic discharge protection and prevention test interface | Mill-Jer Wang, Hung-Chih Lin, Hao Chen | 2016-02-02 |
| 9234940 | Integrated fan-out wafer architecture and test method | Mill-Jer Wang, Hung-Chih Lin, Hao Chen | 2016-01-12 |