Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9417287 | Scheme for masking output of scan chains in test circuit | Subramanian Chebiyam, Jyotirmoy Saikia, Parthajit Bhattacharya, Rohit Kapur | 2016-08-16 |
| 9239897 | Hierarchical testing architecture using core circuit with pseudo-interfaces | Subramanian Chebiyam, Santosh Kulkarni, Rohit Kapur | 2016-01-19 |