| 9507738 |
Method and system for synchronizing address and control signals in threaded memory modules |
Arun Vaidyanath |
2016-11-29 |
| 9472262 |
Memory controller |
Frederick A. Ware, Ely Tsern, Richard E. Perego |
2016-10-18 |
| 9460021 |
System including hierarchical memory modules having different types of integrated circuit memory devices |
Mark A. Horowitz |
2016-10-04 |
| 9432179 |
Signaling system with adaptive timing calibration |
Bret G. Stott, Frederick A. Ware |
2016-08-30 |
| 9411767 |
Flash controller to provide a value that represents a parameter to a flash memory |
Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe |
2016-08-09 |
| 9367248 |
Memory component with pattern register circuitry to provide data patterns for calibration |
Richard E. Perego, Stefanos Sidiropoulos, Ely Tsern, Frederick A. Ware |
2016-06-14 |
| 9323711 |
Chip having port to receive value that represents adjustment to transmission parameter |
Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe |
2016-04-26 |
| 9311976 |
Memory module |
Frederick A. Ware, Ely Tsern, Richard E. Perego |
2016-04-12 |
| 9292223 |
Micro-threaded memory |
Frederick A. Ware, Wayne S. Richardson, Chad A. Bellows, Lawrence Lai |
2016-03-22 |
| 9256376 |
Methods and circuits for dynamically scaling DRAM power and performance |
Ely Tsern, Thomas Vogelsang, Scott C. Best |
2016-02-09 |
| 9257159 |
Low power memory device |
Frederick A. Ware, Ely Tsern |
2016-02-09 |
| 9257151 |
Printed-circuit board supporting memory systems with multiple data-bus configurations |
Richard E. Perego, Donald C. Stark, Frederick A. Ware, Ely Tsern |
2016-02-09 |
| 9256557 |
Memory controller for selective rank or subrank access |
Frederick A. Ware |
2016-02-09 |