Issued Patents 2016
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9531391 | Frequency-agile clock multiplier | Yue Lu | 2016-12-27 |
| 9515814 | Phase control block for managing multiple clock domains in systems with frequency offsets | Hae-Chang Lee, Carl W. Werner | 2016-12-06 |
| 9491011 | Methods and systems for transmitting data by modulating transmitter filter coefficients | Jaeha Kim, Haechang Lee, Jung-Hoon Chun | 2016-11-08 |
| 9455825 | Receiver with clock recovery circuit and adaptive sample and equalizer timing | Qi Lin, Brian S. Leibowitz, Hae-Chang Lee, Jihong Ren, Kyung Suk Oh | 2016-09-27 |
| 9425997 | Methods and circuits for asymmetric distribution of channel equalization between devices | Fariborz Assaderaghi, Brian S. Leibowitz, Hae-Chang Lee, Jihong Ren, Qi Lin | 2016-08-23 |
| 9419825 | Selectable-tap equalizer | Vladimir Stojanovic, Fred F. Chen | 2016-08-16 |
| 9411767 | Flash controller to provide a value that represents a parameter to a flash memory | Mark A. Horowitz, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly | 2016-08-09 |
| 9405678 | Flash memory controller with calibrated data communication | Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz, Leung Yu +5 more | 2016-08-02 |
| 9407473 | Partial response receiver | Vladimir Stojanovic, Andrew Ho, Anthony Bessios, Bruno W. Garlepp, Grace Tsang +2 more | 2016-08-02 |
| 9397868 | Split-path equalizer and related methods, devices and systems | Masum Hossain | 2016-07-19 |
| 9397823 | Methods and circuits for reducing clock jitter | Teva J. Stone, Jihong Ren | 2016-07-19 |
| 9356743 | Method and apparatus for evaluating and optimizing a signaling system | Pak Shing Chau, William Stonecypher | 2016-05-31 |
| 9344074 | Low-latency, frequency-agile clock multiplier | Brian S. Leibowitz, Masum Hossain | 2016-05-17 |
| 9344064 | Integrated circuit comprising frequency change detection circuitry | Kambiz Kaviani, Kashinath Prabhu, Brian Hing-Kit Tsang | 2016-05-17 |
| 9323711 | Chip having port to receive value that represents adjustment to transmission parameter | Mark A. Horowitz, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly | 2016-04-26 |
| 9304579 | Fast-wake memory control | Frederick A. Ware, Brian S. Leibowitz | 2016-04-05 |
| 9299408 | Integrated circuit comprising circuitry to change a clock signal frequency while a data signal is valid | Brian Hing-Kit Tsang | 2016-03-29 |