| 9515008 |
Techniques for interconnecting stacked dies using connection sites |
Ely Tsern, Thomas Vogelsang |
2016-12-06 |
$1,607,000 |
| 9502096 |
Protocol for memory power-mode control |
Wayne F. Ellis, Wayne S. Richardson, Akash Bansal, Lawrence Lai, Kishore Ven Kasamsetty |
2016-11-22 |
$2,903,000 |
| 9501433 |
Semiconductor memory systems with on-die data buffering |
Amir Amirkhany, Suresh Rajan, Mohammad Hekmat, Dinesh Patil |
2016-11-22 |
$2,903,000 |
| 9490009 |
Fast read speed memory device |
Deepak C. Sekar, Gary B. Bronner |
2016-11-08 |
$1,286,000 |
| 9490002 |
Reduced refresh power |
Brent Haukness, Scott C. Best, Gary B. Bronner |
2016-11-08 |
$1,286,000 |
| 9477547 |
Controller device with retransmission upon error |
Yuanlong Wang |
2016-10-25 |
$2,582,000 |
| 9472262 |
Memory controller |
Ely Tsern, Richard E. Perego, Craig E. Hampel |
2016-10-18 |
$3,759,000 |
| 9465961 |
Methods and circuits for securing proprietary memory transactions |
Brian S. Leibowitz, Pradeep Batra, Trung Diep |
2016-10-11 |
$2,899,000 |
| 9459960 |
Controller device for use with electrically erasable programmable memory chip with error detection and retry modes of operation |
Ely Tsern, Mark A. Horowitz |
2016-10-04 |
$4,132,000 |
| 9450614 |
Memory module with integrated error correction |
Scott C. Best |
2016-09-20 |
$6,161,000 |
| 9437279 |
Memory controller with clock-to-strobe skew compensation |
— |
2016-09-06 |
$2,779,000 |
| 9437276 |
Maintenance operations in a DRAM |
Robert E. Palmer, John W. Poulton |
2016-09-06 |
$2,779,000 |
| 9430324 |
Memory repair method and apparatus based on error code tracking |
Ely Tsern |
2016-08-30 |
$1,706,000 |
| 9432179 |
Signaling system with adaptive timing calibration |
Bret G. Stott, Craig E. Hampel |
2016-08-30 |
$1,706,000 |
| 9431090 |
Memory systems and methods for dynamically phase adjusting a write strobe and data to account for receive-clock drift |
— |
2016-08-30 |
$1,706,000 |
| 9431089 |
Optimizing power in a memory device |
Dinesh Patil, Amir Amirkhany, Farrukh Aquil, Kambiz Kaviani |
2016-08-30 |
$1,706,000 |
| 9431063 |
Stacked memory having same timing domain read data and redundancy |
Paul D. Franzon |
2016-08-30 |
$1,706,000 |
| 9417687 |
Dynamically changing data access bandwidth by selectively enabling and disabling data links |
— |
2016-08-16 |
$1,801,000 |
| 9411678 |
DRAM retention monitoring method for dynamic error correction |
Suresh Rajan, Ely Tsern, Thomas Vogelsang, Wayne F. Ellis |
2016-08-09 |
$4,794,000 |
| 9378787 |
Memory controllers, systems, and methods supporting multiple request modes |
Richard E. Perego |
2016-06-28 |
$3,097,000 |
| 9367248 |
Memory component with pattern register circuitry to provide data patterns for calibration |
Craig E. Hampel, Richard E. Perego, Stefanos Sidiropoulos, Ely Tsern |
2016-06-14 |
$4,349,000 |
| 9362002 |
Stacked semiconductor device |
— |
2016-06-07 |
$4,400,000 |
| 9355021 |
Cross-threaded memory system |
Kishore Ven Kasamsetty |
2016-05-31 |
$6,507,000 |
| 9350421 |
Configurable, power supply voltage referenced single-ended signaling with ESD protection |
John W. Poulton, Carl W. Werner |
2016-05-24 |
$6,238,000 |
| 9330735 |
Memory with deferred fractional row activation |
James E. Harris, Thomas Vogelsang, Ian Shaeffer |
2016-05-03 |
$6,080,000 |