Issued Patents 2016
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9466790 | Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines | — | 2016-10-11 |
| 9330763 | Operation modes for an inverted NAND architecture | Yanli Zhang, Johann Alsmeier, Jian Chen | 2016-05-03 |
| 9331181 | Nanodot enhanced hybrid floating gate for non-volatile memory devices | Donovan Lee, James Kai, Henry Chien, George Matamis, Vinod R. Purayath | 2016-05-03 |
| 9245629 | Method for non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines | Luca Fasoli, Masaaki Higashitani, Roy E. Scheuerlein | 2016-01-26 |
| 9236122 | Shared-gate vertical-TFT for vertical bit line array | Tianhong Yan, Tz-Yi Liu, Tim Chen, Perumal Ratnam | 2016-01-12 |
| 9227456 | Memories with cylindrical read/write stacks | Henry Chien, Yao-Sheng Lee, Johann Alsmeier | 2016-01-05 |