JC

Jasmeet S. Chawla

IN Intel: 2 patents #1,153 of 5,207Top 25%
Overall (2016): #135,337 of 481,213Top 30%
2
Patents 2016

Issued Patents 2016

Patent #TitleCo-InventorsDate
9385082 Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches Christopher J. Jezewski 2016-07-05
9379010 Methods for forming interconnect layers having tight pitch interconnect structures Christopher J. Jezewski, Kanwal Jit Singh, Alan M. Myers, Elliot N. Tan, Richard E. Schenker 2016-06-28