Issued Patents 2016
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9530740 | 3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach | Kevin J. Lee, Mark Bohr, Christopher M. Pelto, Hiten Kothari, Seshu V. Sattiraju +1 more | 2016-12-27 |
| 9496173 | Thickened stress relief and power distribution layer | Kevin J. Fischer, Christopher M. Pelto | 2016-11-15 |
| 9449913 | 3D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias | Kevin J. Lee, Mark Bohr, Christopher M. Pelto, Hiten Kothari, Seshu V. Sattiraju +1 more | 2016-09-20 |
| 9391013 | 3D integrated circuit package with window interposer | Debendra Mallik, Ram Viswanath, Sriram Srinivasan, Mark Bohr, Sairam Agraharam | 2016-07-12 |