Issued Patents 2016
Showing 151–164 of 164 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9256427 | Tracking multiple conditions in a general purpose register and instruction therefor | Dan F. Greiner | 2016-02-09 |
| 9250881 | Selection of an entry point of a function having multiple entry points | Ulrich Weigand | 2016-02-02 |
| 9251092 | Hybrid address translation | Anthony J. Bybell | 2016-02-02 |
| 9251089 | System supporting multiple partitions with differing translation formats | — | 2016-02-02 |
| 9251088 | Mechanisms for eliminating a race condition between a hypervisor-performed emulation process requiring a translation operation and a concurrent translation table entry invalidation | Bradly G. Frey, Benjamin Herrenschmidt | 2016-02-02 |
| 9250904 | Modify and execute sequential instruction facility and instructions therefor | Eric M. Schwarz | 2016-02-02 |
| 9250899 | Method and apparatus for spatial register partitioning with a multi-bit cell register file | — | 2016-02-02 |
| 9250875 | Table of contents pointer value save and restore placeholder positioning | Ulrich Weigand | 2016-02-02 |
| 9244781 | Salvaging hardware transactions | Harold W. Cain, III, Maged M. Michael, Valentina Salapura, Eric M. Schwarz | 2016-01-26 |
| 9244854 | Transparent code patching including updating of address translation structures | — | 2016-01-26 |
| 9244782 | Salvaging hardware transactions | Harold W. Cain, III, Maged M. Michael, Valentina Salapura, Eric M. Schwarz | 2016-01-26 |
| 9244663 | Managing table of contents pointer value saves | Ulrich Weigand | 2016-01-26 |
| 9229695 | Usage of TOC register as application register | Ulrich Weigand | 2016-01-05 |
| 9229715 | Method and apparatus for efficient inter-thread synchronization for helper threads | John Kevin Patrick O'Brien, Valentina Salapura, Zehra N. Sura | 2016-01-05 |