Issued Patents 2011
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8079539 | Built-in module for inverter and having tension control with integrated tension and velocity closed loops | Cheng-Hsiang Kuo | 2011-12-20 |
| 8062933 | Method for fabricating heat dissipating package structure | Cheng-Hsu Hsiao | 2011-11-22 |
| 8058100 | Method for fabricating chip scale package structure with metal pads exposed from an encapsulant | Han-Ping Pu, Cheng-Hsu Hsiao | 2011-11-15 |
| 8026602 | Fabrication method of semiconductor device having conductive bumps | Chun-Chi Ke | 2011-09-27 |
| 8013436 | Heat dissipation package structure and method for fabricating the same | Min-Shun Hung, Yo-Yi Tsai, Cheng-Hsu Hsiao | 2011-09-06 |
| 8013443 | Electronic carrier board and package structure thereof | Fang-Lin Tsai, Ho-Yi Tsai, Chih-Ming Huang | 2011-09-06 |
| 8008769 | Heat-dissipating semiconductor package structure and method for manufacturing the same | Wen-Tsung Tseng, Ho-Yi Tsai, Cheng-Hsu Hsiao | 2011-08-30 |
| RE42653 | Semiconductor package with heat dissipating structure | — | 2011-08-30 |
| 7993967 | Semiconductor package fabrication method | Yih-Jenn Jiang, Han-Ping Pu, Cheng-Hsu Hsiao | 2011-08-09 |
| 7985618 | Semiconductor device has encapsulant with chamfer such that portion of substrate and chamfer are exposed from encapsulant and remaining portion of surface of substrate is covered by encapsulant | Yun-Lung Tsai, Yu-Chieh Tsai, Chien-Chih Chen | 2011-07-26 |
| 7981729 | Fabrication method of multi-chip stack structure | Jung-Pin Huang, Chin-Huang Chang, Chung-Lun Liu, Cheng-Hsu Hsiao | 2011-07-19 |
| 7939383 | Method for fabricating semiconductor package free of substrate | Yu-Po Wang, Chih-Ming Huang | 2011-05-10 |
| 7934313 | Package structure fabrication method | Pang-Chun Lin, Hsiao-Jen Hung, Chun-Yuan Li, Chun-Chi Ke | 2011-05-03 |
| 7893547 | Semiconductor package with a support structure and fabrication method thereof | Fu Tang | 2011-02-22 |
| 7884456 | Semiconductor device has encapsulant with chamfer such that portion of substrate and chamfer are exposed from encapsulant and remaining portion of surface of substrate is covered by encapsulant | Yun-Lung Tsai, Yu-Chieh Tsai, Chien-Chih Chen | 2011-02-08 |
| 7863740 | Semiconductor device having conductive bumps, metallic layers, covering layers and fabrication method thereof | Chun-Chi Ke | 2011-01-04 |