Issued Patents 2011
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8084319 | Precisely tuning feature sizes on hard masks via plasma treatment | Hongbo Peng, Stephen M. Rossnagel | 2011-12-27 |
| 8053330 | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide | Joel P. de Souza, John A. Ott, Alexander Reznicek, Devendra K. Sadana | 2011-11-08 |
| 8030145 | Back-gated fully depleted SOI transistor | Leland Chang, Brian L. Ji, Arvind Kumar, Amlan Majumdar, Leathen Shi +1 more | 2011-10-04 |
| 7999319 | Trench-edge-defect-free recrystallization by edge-angle-optimized solid phase epitaxy: method and applications to hybrid orientation substrates | Chun-Yung Sung, Haizhou Yin | 2011-08-16 |
| 7977712 | Asymmetric source and drain field effect structure | Huilong Zhu, Hong Lin, Kai Xiu, Haizhou Yin | 2011-07-12 |
| 7968459 | Ion implantation combined with in situ or ex situ heat treatment for improved field effect transistors | Stephen W. Bedell, Joel P. Desouza, Zhibin Ren, Alexander Reznicek, Devandra K. Sadana +1 more | 2011-06-28 |
| 7960263 | Amorphization/templated recrystallization method for hybrid orientation substrates | Keith E. Fogel, Chun-Yung Sung, Haizhou Yin | 2011-06-14 |
| 7923337 | Fin field effect transistor devices with self-aligned source and drain regions | Josephine B. Chang, Michael A. Guillorn, Wilfried E. Haensch | 2011-04-12 |
| 7914619 | Thick epitaxial silicon by grain reorientation annealing and applications thereof | Joel P. de Souza, Keith E. Fogel, Daniel A. Inns, Devendra K. Sadana | 2011-03-29 |
| 7887711 | Method for etching chemically inert metal oxides | Douglas A. Buchanan, Eduard A. Cartier, Evgeni Gousev, Harald Okorn-Schmidt | 2011-02-15 |
| 7868410 | Gate stack engineering by electrochemical processing utilizing through-gate-dielectric current flow | Philippe M. Vereecken, Veeraraghavan S. Basker, Cyril Cabral, Jr., Emanuel I. Cooper, Hariklia Deligianni +4 more | 2011-01-11 |
| 7863712 | Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same | Haizhou Yin, John A. Ott, Chun-Yung Sung | 2011-01-04 |