Issued Patents 2011
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8053759 | Ion implantation for suppression of defects in annealed SiGe layers | Stephen W. Bedell, Huajie Chen, Devendra K. Sadana, Ghavam G. Shahidi | 2011-11-08 |
| 8026613 | Interconnections for flip-chip using lead-free solders and having reaction barrier layers | Balaram Ghosal, Sung Kwon Kang, Stephen Kilpatrick, Paul A. Lauro, Henry A. Nye, III +2 more | 2011-09-27 |
| 7967062 | Thermally conductive composite interface, cooled electronic assemblies employing the same, and methods of fabrication thereof | Levi A. Campbell, Richard C. Chu, Michael J. Ellsworth, Jr., Madhusudan K. Iyengar, Roger R. Schmidt +1 more | 2011-06-28 |
| 7960263 | Amorphization/templated recrystallization method for hybrid orientation substrates | Katherine L. Saenger, Chun-Yung Sung, Haizhou Yin | 2011-06-14 |
| 7935612 | Layer transfer using boron-doped SiGe layer | Stephen W. Bedell, Daniel A. Inns, Jeehwan Kim, Devendra K. Sadana, James Vichiconti | 2011-05-03 |
| 7923849 | Interconnections for flip-chip using lead-free solders and having reaction barrier layers | Balaram Ghosal, Sung Kwon Kang, Stephen Kilpatrick, Paul A. Lauro, Henry A. Nye, III +2 more | 2011-04-12 |
| 7914619 | Thick epitaxial silicon by grain reorientation annealing and applications thereof | Joel P. de Souza, Daniel A. Inns, Devendra K. Sadana, Katherine L. Saenger | 2011-03-29 |
| 7897444 | Strained semiconductor-on-insulator (sSOI) by a simox method | Thomas N. Adam, Stephen W. Bedell, Joel P. de Souza, Alexander Reznicek, Devendra K. Sadana +1 more | 2011-03-01 |
| 7880241 | Low-temperature electrically activated gate electrode and method of fabricating same | John C. Arnold, Stephen W. Bedell, Devendra K. Sadana | 2011-02-01 |