Issued Patents 2011
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8071983 | Semiconductor device structures and methods of forming semiconductor structures | Justin K. Brask, Jack T. Kavalieros, Uday Shah, Suman Datta, Robert S. Chau +1 more | 2011-12-06 |
| 8030145 | Back-gated fully depleted SOI transistor | Leland Chang, Brian L. Ji, Arvind Kumar, Katherine L. Saenger, Leathen Shi +1 more | 2011-10-04 |
| 8012820 | Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension | Gen Pei, Zhibin Ren, Dinkar Singh, Jeffrey W. Sleight | 2011-09-06 |
| 7993995 | Metal-gated MOSFET devices having scaled gate stack thickness including gettering species in a buried oxide | Renee T. Mo, Zhibin Ren, Jeffrey W. Sleight | 2011-08-09 |
| 7985633 | Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors | Jin Cai, Josephine B. Chang, Leland Chang, Brian L. Ji, Steven J. Koester | 2011-07-26 |
| 7919812 | Partially depleted SOI field effect transistor having a metallized source side halo region | Jin Cai, Wilfried E. Haensch | 2011-04-05 |
| 7915167 | Fabrication of channel wraparound gate structure for field-effect transistor | Marko Radosavljevic, Suman Datta, Jack T. Kavalieros, Brian S. Doyle, Justin K. Brask +1 more | 2011-03-29 |
| 7898041 | Block contact architectures for nanoscale channel transistors | Marko Radosavljevic, Brian S. Doyle, Jack T. Kavalieros, Mark L. Doczy, Justin K. Brask +3 more | 2011-03-01 |
| 7871869 | Extremely-thin silicon-on-insulator transistor with raised source/drain | Eduard A. Cartier, Steven J. Koester, Kingsuk Maitra, Renee T. Mo | 2011-01-18 |