SK

Srinivas R. Kommoori

CS Cadence Design Systems: 1 patents #62 of 259Top 25%
📍 Milpitas, CA: #115 of 327 inventorsTop 40%
🗺 California: #14,783 of 41,698 inventorsTop 40%
Overall (2011): #162,618 of 364,097Top 45%
1
Patents 2011

Issued Patents 2011

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
7886238 Visual yield analysis of intergrated circuit layouts Harsh Sharma, Rajeev Srivastava, Bharat Bhushan, Mithunjoy Parui, Albert Y. Lee 2011-02-08