KM

Kiyoshi Mitani

SC Shin-Etsu Handotai Co.: 4 patents #1 of 62Top 2%
ST S.O.I. Tec Silicon On Insulator Technologies: 1 patents #8 of 33Top 25%
📍 Osaka, NC: #1 of 2 inventorsTop 50%
Overall (2005): #6,739 of 245,428Top 3%
5
Patents 2005

Issued Patents 2005

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
6959854 Production method for bonded substrates Isao Yokokawa, Masatake Nakano 2005-11-01
6902988 Method for treating substrates for microelectronics and substrates obtained by said method Thierry Barge, Bruno Ghyselen, Toshiaki Iwamatsu, Hideki Naruoka, Junichiro Furihata 2005-06-07
6900113 Method for producing bonded wafer and bonded wafer Masatake Nakano, Isao Yokokawa 2005-05-31
6884696 Method for producing bonding wafer Hiroji Aga, Shinichi Tomizawa 2005-04-26
6846718 Method for producing SOI wafer and SOI wafer Hiroji Aga, Naoto Tate, Susumu Kuwabara 2005-01-25