Issued Patents 2004
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6820181 | Method and system for controlling memory accesses to memory modules having a memory hub architecture | Joseph M. Jeddeloh | 2004-11-16 |
| 6816426 | Semiconductor device with self refresh test mode | — | 2004-11-09 |
| 6792372 | Method and apparatus for independent output driver calibration | — | 2004-09-14 |
| 6789175 | Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths | Kevin J. Ryan | 2004-09-07 |
| 6784367 | Microelectronic device assemblies having a shielded input and methods for manufacturing and operating such microelectronic device assemblies | Ernest J. Russell, Bharath Nagabhushanam, Roger D. Norwood | 2004-08-31 |
| 6747344 | Lead frame assemblies with voltage reference plane and IC packages including same | David J. Corisis, Jerry M. Brooks | 2004-06-08 |
| 6745268 | Capacitive multidrop bus compensation | Roy Greeff | 2004-06-01 |
| 6735709 | Method of timing calibration using slower data rate pattern | Kevin J. Ryan, Joseph M. Jeddeloh | 2004-05-11 |
| 6681480 | Method and apparatus for installing a circuit device | Larry D. Kinsman, Mike Brooks, Warren M. Farnworth, Walter L. Moden | 2004-01-27 |