Issued Patents 2004
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6825522 | Capacitor electrode having an interface layer of different chemical composition formed on a bulk layer | Don Powell | 2004-11-30 |
| 6822342 | Raised-lines overlay semiconductor targets and method of making the same | Pary Baluswamy, Ceredig Roberts, Tim H. Bossart | 2004-11-23 |
| 6798026 | Conductor layer nitridation | Yongjun Jeff Hu, Randhir P. S. Thakur | 2004-09-28 |
| 6794703 | High pressure reoxidation/anneal of high dielectric constant | Randhir P. S. Thakur | 2004-09-21 |
| 6773981 | Methods of forming capacitors | Husam N. Al-Shareef, F. Daniel Gealy, Randhir P. S. Thakur | 2004-08-10 |
| 6756634 | Gated semiconductor assemblies | Mark A. Helm, Mark Fischer, John T. Moore | 2004-06-29 |
| 6720609 | Structure for reducing contact aspect ratios | Vishnu K. Agarwal | 2004-04-13 |
| 6696336 | Double sided container process used during the manufacture of a semiconductor device | Ronald A. Weimer, John T. Moore | 2004-02-24 |
| 6693345 | Semiconductor wafer assemblies comprising photoresist over silicon nitride materials | John T. Moore, Mark Fischer, J. Brett Rolfson, Annette L. Martin, Ardavan Niroomand | 2004-02-17 |
| 6693320 | Capacitor structures with recessed hemispherical grain silicon | Whonchee Lee | 2004-02-17 |
| 6677661 | Semiconductive wafer assemblies | John T. Moore, Mark Fischer, Randhir P. S. Thakur | 2004-01-13 |
| 6677636 | Structure for reducing contact aspect ratios | Vishnu K. Agarwal | 2004-01-13 |
| 6673689 | Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same | Husam N. Al-Shareef, Randhir P. S. Thakur | 2004-01-06 |