Issued Patents 2004
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6812530 | Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures | Klaus Schuegraf | 2004-11-02 |
| 6808758 | Pulse precursor deposition process for forming layers in semiconductor devices | — | 2004-10-26 |
| 6806572 | Structure for contact formation using a silicon-germanium alloy | — | 2004-10-19 |
| 6803297 | Optimal spike anneal ambient | Dean Jennings, Sairaju Tallavarjula | 2004-10-12 |
| 6798026 | Conductor layer nitridation | Yongjun Jeff Hu, Scott DeBoer | 2004-09-28 |
| 6797601 | Methods for forming wordlines, transistor gates, and conductive interconnects | Klaus Schuegraf | 2004-09-28 |
| 6794703 | High pressure reoxidation/anneal of high dielectric constant | Scott DeBoer | 2004-09-21 |
| 6787482 | Method to form a DRAM capacitor using low temperature reoxidation | Brett Rolfson | 2004-09-07 |
| 6784052 | Method of forming a capacitor with two diffusion barrier layers formed in the same step | Klaus Schuegraf | 2004-08-31 |
| 6773981 | Methods of forming capacitors | Husam N. Al-Shareef, Scott DeBoer, F. Daniel Gealy | 2004-08-10 |
| 6737696 | DRAM capacitor formulation using a double-sided electrode | Scott J. DeBoer, Husam N. Al-Shareef | 2004-05-18 |
| 6730584 | Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures | Klaus Schuegraf, Carl Marshall Eliot Powell | 2004-05-04 |
| 6717211 | Shallow doped junctions with a variable profile gradation of dopants | Fernando Gonzalez | 2004-04-06 |
| 6699752 | Formation of conductive rugged silicon | Er-Xuan Ping | 2004-03-02 |
| 6690044 | Approach to avoid buckling BPSG by using an intermediate barrier layer | Trung T. Doan, Yauh-Ching Liu | 2004-02-10 |
| 6682970 | Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer | Garry Mercaldi, Michael Nuttall | 2004-01-27 |
| 6677247 | Method of increasing the etch selectivity of a contact sidewall to a preclean etchant | Zheng Yuan, Steve Ghanayem | 2004-01-13 |
| 6677661 | Semiconductive wafer assemblies | Scott DeBoer, John T. Moore, Mark Fischer | 2004-01-13 |
| 6673689 | Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same | Husam N. Al-Shareef, Scott DeBoer | 2004-01-06 |