MY

Masaru Yano

AM AMD: 3 patents #203 of 1,053Top 20%
Fujitsu Limited: 3 patents #245 of 3,284Top 8%
📍 Yokohama, CA: #22 of 111 inventorsTop 20%
Overall (2003): #14,302 of 273,478Top 6%
4
Patents 2003

Issued Patents 2003

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6621741 System for programming verification 2003-09-16
6622230 Multi-set block erase Shane Hollmer, Michael Chung 2003-09-16
6573140 Process for making a dual bit memory device with isolated polysilicon floating gates Jusuke Ogura, Kiyoshi Izumi, Hideki Komori, Tuan Pham, Angela T. Hui 2003-06-03
6535424 Voltage boost circuit using supply voltage detection to compensate for supply voltage variations in read mode voltage Binh Quang Le, Santosh Yachareni 2003-03-18