Issued Patents 2003
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6660584 | Selective polysilicon stud growth of 6F2 memory cell manufacturing having a convex upper surface profile | — | 2003-12-09 |
| 6649962 | Selective polysilicon stud growth | — | 2003-11-18 |
| 6607944 | Method of making memory cell arrays | D. Mark Duncan, Tyler Lowrey, Rob B. Kerr, Kris K. Brown | 2003-08-19 |
| 6599800 | Methods of forming capacitors, and methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions | Tyler Lowrey, Alan R. Reinberg, Mark Durcan | 2003-07-29 |
| 6600190 | Methods of forming capacitors, methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions | Tyler Lowrey, Alan R. Reinberg, D. Mark Durcan | 2003-07-29 |
| 6589876 | Methods of forming conductive capacitor plugs, methods of forming capacitor contact openings, and methods of forming memory arrays | — | 2003-07-08 |
| 6580149 | Double LDD devices for improved DRAM refresh | Mark McQueen, Robert Kerr | 2003-06-17 |
| 6579751 | Semiconductor processing methods of forming integrated circuitry | — | 2003-06-17 |
| 6548390 | SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY | Pai-Hung Pan, Tyler Lowrey | 2003-04-15 |
| 6545904 | 6F2 DRAM ARRAY, A DRAM ARRAY FORMED ON A SEMICONDUCTIVE SUBSTRATE, A METHOD OF FORMING MEMORY CELLS IN A 6F2 DRAM ARRAY AND A METHOD OF ISOLATING A SINGLE ROW OF MEMORY CELLS IN A 6F2 DRAM ARRAY | — | 2003-04-08 |
| 6541362 | Methods of forming semiconductor structures | Leonard Forbes, Kie Y. Ahn | 2003-04-01 |
| 6506645 | Depletion compensated polysilicon electrodes | Ravi Iyer, Charles L. Turner | 2003-01-14 |